The present invention relates, in general, to semiconductor device manufacture, and more particularly to a method for producing a thin semiconductor wafer suited to integrated circuit manufacture.
One of the fundamental parameters of integrated circuit manufacture is the electrical isolation which is provided between the different devices which comprise the integrated circuit. It has long been recognized that isolation using a high quality dielectric material, or "dielectric isolation" such as silicon dioxide, greatly enhances the performance of integrated circuits in just about every way. For example, integrated circuits intended for military applications which must operate in the presence of ionizing radiation typically use some form of dielectric isolation.
Numerous methods of fabricating such dielectric isolated integrated circuits have been used in the past, including methods such as silicon on sapphire and epitaxial lateral overgrowth of silicon on an oxide isolation layer. Another technique is called separation by oxygen implantation or SIMOX. The SIMOX process relies on implantation of oxygen ions beneath the surface of the silicon to create a buried oxide layer. This process allows the depth of the implant to be precisely controlled, but costs approximately $450 per wafer and has a high defect density. More recently bonded wafer techniques have lowered the cost of dielectric isolation to approximately $100 per wafer. For integrated circuit manufacturing, these bonded wafer techniques typically bond an active wafer to a silicon dioxide layer which has been grown on a handle wafer. The active wafer is then thinned by a grinding process to achieve a desired thickness of the silicon film. These bonded wafer techniques can produce a silicon film having a low defect density, but with poor control of thickness of the silicon film above the oxide.
Methods developed for the fabrication of thin silicon membranes have addressed this problem by the addition of an etch step following mechanical removal of excess silicon. This produces a silicon film with a defect density which is too high to use for integrated circuit manufacturing. The prior art method of etching to produce a thin silicon film for membranes is described in a paper entitled "Fabrication and Characterization of Si Membranes" by E. D. Palik, 0. J. Glembocki, and R. E. Stahlbush in Journal of the Electrochemical Society: Solid-State Science and Technology, Vol. 135, No. 12, December 1988, which is incorporated herein by reference. Briefly, a wafer is fabricated having a thin p+ layer with a doping concentration of approximately 10.sup.20 atoms cm.sup.-3 of boron. The silicon film is epitaxially grown on top of this thin p+ layer. After grinding away most of the excess silicon the membrane area is etched using the p+layer as an etch stop. This method has been applied to commercially available silicon wafers. These wafers provide a silicon film with good thickness control, but an unacceptably high defect density due to the heavy doping of boron ions required for the thin p+ layer. This makes the method unsuitable for fabrication of silicon wafers to be used for high density integrated circuits.
There is a need for a method to produce dielectrically isolated silicon films, suited for integrated circuit manufacture, which can combine the low cost and low defect density of bonded wafers with the accurate thickness control of SIMOX.